...the world's most energy friendly microcontrollers
Note
When in SmartCard mode with repeat enabled, none of the actions, except generate break,
will be performed until the frame is transmitted without failure. Generation of a break in
SmartCard mode with repeat enabled will cause the USART to detect a NACK on every
frame.
16.3.2.4 Data Reception
Data reception is enabled by setting RXEN in USARTn_CMD. When the receiver is enabled, it actively
samples the input looking for a transition from high to low indicating the start baud of a new frame. When
a start baud is found, reception of the new frame begins if the receive shift register is empty and ready
for new data. When the frame has been received, it is pushed into the receive buffer, making the shift
register ready for another frame of data, and the receiver starts looking for another start baud. If the
receive buffer is full, the received frame remains in the shift register until more space in the receive
buffer is available. If an incoming frame is detected while both the receive buffer and the receive shift
register are full, the data in the shift register is overwritten, and the RXOF interrupt flag in USARTn_IF
is set to indicate the buffer overflow.
The receiver can be disabled by setting the command bit RXDIS in USARTn_CMD. Any frame currently
being received when the receiver is disabled is discarded. Whether or not the receiver is enabled at a
given time can be read out from RXENS in USARTn_STATUS.
16.3.2.4.1 Receive Buffer Operation
When data becomes available in the receive buffer, the RXDATAV flag in USARTn_STATUS, and
the RXDATAV interrupt flag in USARTn_IF are set, and when the buffer becomes full, RXFULL in
USARTn_STATUS and the RXFULL interrupt flag in USARTn_IF are set. The status flags RXDATAV
and RXFULL are automatically cleared by hardware when their condition is no longer true. This also
goes for the RXDATAV interrupt flag, but the RXFULL interrupt flag must be cleared by software. When
the RXFULL flag is set, notifying that the buffer is full, space is still available in the receive shift register
for one more frame.
Data can be read from the receive buffer in a number of ways. USARTn_RXDATA gives access to the
8 least significant bits of the received frame, and USARTn_RXDOUBLE makes it possible to read the 8
least significant bits of two frames at once, pulling two frames from the buffer. To get access to the 9th,
most significant bit, USARTn_RXDATAX must be used. This register also contains status information
regarding the frame. USARTn_RXDOUBLEX can be used to get two frames complete with the 9th bits
and status bits.
When a frame is read from the receive buffer using USARTn_RXDATA or USARTn_RXDATAX,
the frame is pulled out of the buffer, making room for a new frame. USARTn_RXDOUBLE and
USARTn_RXDOUBLEX pull two frames out of the buffer. If an attempt is done to read more frames from
the buffer than what is available, the RXUF interrupt flag in USARTn_IF is set to signal the underflow,
and the data read from the buffer is undefined.
Frames can be read from the receive buffer without removing the data by using USARTn_RXDATAXP
and USARTn_RXDOUBLEXP. USARTn_RXDATAXP gives access the first frame in the buffer with
status bits, while USARTn_RXDOUBLEXP gives access to both frames with status bits. The data read
from these registers when the receive buffer is empty is undefined. If the receive buffer contains one
valid frame, the first frame in USARTn_RXDOUBLEXP will be valid. No underflow interrupt is generated
by a read using these registers, i.e. RXUF in USARTn_IF is never set as a result of reading from
USARTn_RXDATAXP or USARTn_RXDOUBLEXP.
The basic operation of the receive buffer when DATABITS in USARTn_FRAME is configured to less
than 10 bits is shown in Figure 16.4 (p. 185) .
2011-04-12 - d0001_Rev1.10
184
www.energymicro.com
相关PDF资料
EFM32GG-STK3700 KIT STARTER GIANT GECKO
EFM32LG-DK3650 KIT DEV EFM32 LEOPARD GECKO
EK-K7-KC705-CES-G-J KINTEX-7 FPGA KC705 EVAL KIT
EK-S6-SP601-G KIT EVAL SPARTAN 6 SP601
EK-S6-SP605-G KIT EVAL SPARTAN 6 SP605
EK-V6-ML631-G-J VIRTEX-6 HXT FPGA ML631 EVAL KIT
EK-V7-VC707-CES-G VIRTEX-7 VC707 EVAL KIT
EK-Z7-ZC702-CES-G ZYNQ-7000 EPP ZC702 EVAL KIT
相关代理商/技术参数
EFM32GG230F1024 功能描述:ARM微控制器 - MCU 1024KB FL 128KB RAM RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 处理器系列:STM32F373xx 数据总线宽度:32 bit 最大时钟频率:72 MHz 程序存储器大小:256 KB 数据 RAM 大小:32 KB 片上 ADC:Yes 工作电源电压:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作温度范围:- 40 C to + 85 C 封装 / 箱体:LQFP-48 安装风格:SMD/SMT
EFM32GG230F1024G-E-QFN64R 功能描述:IC MCU 32BIT 1MB FLASH 64QFN 制造商:silicon labs 系列:Giant Gecko 包装:剪切带(CT) 零件状态:在售 核心处理器:ARM? Cortex?-M3 核心尺寸:32-位 速度:48MHz 连接性:I2C,IrDA,智能卡,SPI,UART/USART 外设:欠压检测/复位,DMA,POR,PWM,WDT I/O 数:56 程序存储容量:1MB(1M x 8) 程序存储器类型:闪存 EEPROM 容量:- RAM 容量:128K x 8 电压 - 电源(Vcc/Vdd):1.98 V ~ 3.8 V 数据转换器:A/D 8x12b,D/A 2x12b 振荡器类型:内部 工作温度:-40°C ~ 85°C(TA) 封装/外壳:64-VFQFN 裸露焊盘 供应商器件封装:64-QFN(9x9) 标准包装:1
EFM32GG230F1024-QFN64 制造商:Energy Micro AS 功能描述:GIANT GECKO MCU - Cut TR (SOS) 制造商:Energy Micro 功能描述:GIANT GECKO MCU 制造商:Energy Micro AS 功能描述:IC MCU 32BIT 1MB FLASH 64QFN
EFM32GG230F1024-QFN64T 制造商:Energy Micro AS 功能描述:GIANT GECKO MCU - Trays
EFM32GG230F1024-QFN64-T 制造商:Energy Micro AS 功能描述:IC MCU 32BIT 1MB FLASH 64QFN
EFM32-GG230F1024-SK 制造商:Energy Micro AS 功能描述:GIANT GECKO SAMPLE KIT - Bulk
EFM32GG230F1024-T 制造商:Energy Micro AS 功能描述:IC MCU 32BIT 1MB FLASH 64QFN
EFM32GG230F512 功能描述:ARM微控制器 - MCU 512KB FL 128KB RAM RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 处理器系列:STM32F373xx 数据总线宽度:32 bit 最大时钟频率:72 MHz 程序存储器大小:256 KB 数据 RAM 大小:32 KB 片上 ADC:Yes 工作电源电压:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作温度范围:- 40 C to + 85 C 封装 / 箱体:LQFP-48 安装风格:SMD/SMT